Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating
Reexamination Certificate
2009-02-03
2011-12-20
Whitmore, Stacy (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Testing or evaluating
Reexamination Certificate
active
08082535
ABSTRACT:
A method of testing an IC generates a test design list of test patterns and produces an arc usage string for each test pattern. The arc usage strings are ranked according to the number of untested arcs in each successive test pattern by comparing each of the remaining arc usage strings against an already-tested arc file to identify the arc usage string (test pattern) having the greatest number of untested arcs. A test sequence list of test patterns ranked in order of the most number of untested arcs to the least number of untested arcs is provided to a tester and the IC is tested in order of the test patterns on the test sequence list.
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Anderson Andrew G.
Mansour Teymour M.
McEwen Ian L.
Stamm Reto
Cartier Lois D.
Dimyan Magid
Hewett Scott
Maunu LeRoy D.
Whitmore Stacy
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