Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2006-04-18
2006-04-18
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C365S201000, C714S042000
Reexamination Certificate
active
07032144
ABSTRACT:
A method and system for testing multiported memories, especially when one or more of the ports are not directly accessible without intervening logic. The method and system segregates the multiported memory into at least two portions which are then used for testing the one or more ports which are not directly accessible.
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Adams R. Dean
Eckenrode Thomas J.
Gregor Steven L.
Zarrineh Kamran
Cadence Design Systems Inc.
Dildine R. Stephen
Orrick Herrington & Sutcliffe LLP
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