Method and apparatus for testing memory devices under load

Details Method and apparatus for testing memory devices under load Method and apparatus for testing memory devices under load

1995-10-31

1999-10-05

Moise, Emmanuel L.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

714719, 714763, 360 53, 365201, 39518507, G11C 2900, G11C 700

Patent

active

059616563

ABSTRACT:
A method for verifying a desired operation of an untrusted memory device is performed under load and includes shadowing read and write operations to the untrusted memory device and to a trusted memory device. The shadowing is performed by concurrently writing data to both the trusted and untrusted memory devices, and concurrently reading data from both the trusted and the untrusted memory devices. All data returned from the trusted and untrusted memory devices in response to the read operations are compared, and if any data compared does not have a same value, a value from the trusted memory device is returned and an error indication is generated.

REFERENCES:
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patent: 5588007 (1996-12-01), Ma
patent: 5592618 (1997-01-01), Micka et al.
patent: 5615329 (1997-03-01), Kern et al.
patent: 5668764 (1997-09-01), Surlekar

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