Method and apparatus for testing memory devices

Details Method and apparatus for testing memory devices Method and apparatus for testing memory devices

1998-10-09

2000-09-05

Elms, Richard

Static information storage and retrieval

Read/write circuit

Testing

371 251, 371 212, G11C 700, G11C 2900

Patent

active

061153036

ABSTRACT:
A test circuit for functionally testing memory devices. The test circuit loads a plurality of data bits into the memory device under test. The test circuit subsequently reads the data bits stored in the memory cells, and detects if the logic level of the data bits read is the complement of the logic level written: The logic level is detected over a duration during which at least two data bits are read.

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