Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent
1998-04-27
2000-04-25
De Cady, Albert
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
714717, 714719, 365200, 365201, G11C 2900
Patent
active
060556536
ABSTRACT:
The gangSIMM Memory Tester is a PWA which plugs directly into a CPU's SIMM slot. The gangSIMM Memory Tester contains a known good SIMM, which is connected directly to the CPU's bus. All memory functions for this SIMM slot is provided by the gold SIMM per normal SIMM operation. The CPU bus routed to the gold SIMM on the gangSIMM Memory Tester is also routed to a test bus via a buffer which provides increased drive capacity. The test bus is distributed in parallel to N number of SIMM slots located on the gangSIMM Memory Tester throughout a second set of tri-stating buffers. During read accesses to memory involving the CPUs SIMM slot location where the gangSIMM PWA is directly plugged into, data provided by the gold SIMM is compared on an individual basis with the data provided by an under-test SIMM. This operation occurs in-parallel for all under-test SIMMs.
REFERENCES:
patent: 4992850 (1991-02-01), Corbett et al.
patent: 5961657 (1999-10-01), Park et al.
Book: "Sigma Memory Tester: User's Guide Version 2.17," copyright 1992-1994 by Dark Horse Systems Incorporated.
LeBlanc Michael
Safari Davoud
Smith Edwin
Cady Albert De
Compaq Computer Corporation
Hastick Rudolph
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