Method and apparatus for terminating clock signals upon...

Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data... – Inhibiting timing generator or component

Reexamination Certificate

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Details

C713S600000, C713S500000, C713S300000, C713S320000, C713S322000

Reexamination Certificate

active

06961864

ABSTRACT:
According to one embodiment, a computer system is disclosed. The computer system includes a first clock receiver, one or more clock traces coupled to the clock generator, and clock generator coupled to the one or more clock traces. The clock generator gates clock signals to the first clock receiver in response to detecting that the clock traces have been disconnected from electrical ground.

REFERENCES:
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patent: 5274677 (1993-12-01), Ohuchi et al.
patent: 5603036 (1997-02-01), Wells et al.
patent: 5799194 (1998-08-01), Allen et al.
patent: 6232820 (2001-05-01), Long et al.
patent: 6301671 (2001-10-01), Boice et al.
patent: 6675305 (2004-01-01), Mohammad
patent: 0476394 (1992-03-01), None
PCT Search Report, PCT/US03/12347, Mailed Jun. 5, 2004.

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