Method and apparatus for temperature adaptive refresh in...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S149000, C365S210130

Reexamination Certificate

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06898140

ABSTRACT:
A memory system is provided that includes an array of memory cells that require periodic refresh, and a temperature-adaptive refresh controller. Data retention time of the memory cells decreases exponentially as temperature increases. The temperature-adaptive refresh controller selects the refresh period of the memory cells in response to the subthreshold current of a reference transistor. The subthreshold current of the reference transistor increases exponentially as temperature increases As a result, the refresh period is empirically tied to the data retention time. Consequently, the power required for refresh operations decreases as temperature decreases. Power is therefore conserved in applications that operate predominantly at room temperature.

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