Method and apparatus for systematic and random variation and...

Details Method and apparatus for systematic and random variation and... Method and apparatus for systematic and random variation and...

2008-07-29

2008-07-29

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S205000, C365S207000

Reexamination Certificate

active

07405988

ABSTRACT:
Method and means for random or systematic mismatch compensation for a memory sensing system are disclosed. A sense amplifier includes a bulk voltage source to set the bulk of the sensing transistor to be a voltage different than the voltage driving the sensing transistor. For an NMOS sensing transistor, a triple well is used with the variable bulk voltage. Differential sense amplifiers with various offset compensation are included. Intentional offset creation for useful purpose is also included.

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patent: 7183555 (2007-02-01), Jarron
patent: 2002/0089024 (2002-07-01), Iwata
patent: 2002/0094697 (2002-07-01), Leung et al.
patent: 2003/0103406 (2003-06-01), Tran et al.
patent: 2003/0151072 (2003-08-01), Leung et al.
patent: 2004/0114436 (2004-06-01), Hecht et al.
patent: 2004/0190329 (2004-09-01), Namekawa et al.
patent: 740307 (1996-10-01), None

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