Method and apparatus for synchronizing central processing...

Details Method and apparatus for synchronizing central processing... Method and apparatus for synchronizing central processing...

2011-04-05

2011-04-05

Stiglic, Ryan M (Department: 2111)

Electrical computers and digital processing systems: support

Synchronization of plural processors

C713S401000

Reexamination Certificate

active

07921317

ABSTRACT:
Updating timers of central processing units (CPUs) in a multiprocessor apparatus involves the repeated performance of update operations by a device that is coupled to the CPUs via a memory interface. The operations include selecting one of the plurality of CPUs and determining an offset value that estimates a delay time to process a timer update at the selected CPU. A corrected timer value of the selected CPU is determined based on the offset value and a reference time. The corrected timer value is written to a cache line of the selected CPU to cause the selected CPU to update the timer of the selected CPU.

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