Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2011-06-07
2011-06-07
Nguyen, Viet Q (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
C365S193000, C365S233100, C365S230060
Reexamination Certificate
active
07957211
ABSTRACT:
A circuit for synchronizing row and column access operations in a semiconductor memory having an array of bit line pairs, word lines, memory cells, sense amplifiers, and a sense amplifier power supply circuit for powering the sense amplifiers, the circuit comprising, a first delay circuit for delaying a word line timing pulse by a first predetermined period, a first logic circuit for logically combining the word line timing pulse and the delayed word line timing pulse to produce a sense amplifier enable signal, for enabling a sense amplifier power supply circuit, a second delay circuit for delaying the word line timing pulse by a second predetermined period, and a second logic circuit for logically combining the word line timing pulse and the second delayed word line timing pulse to produce a column select enable signal, for enabling selected ones of a plurality of column access devices wherein the second predetermined time period is selected so that ones of a plurality of column access devices are activated after the sense amplifier power supply circuit is enabled.
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Borden Ladner Gervais LLP
Hung Shin
Mosaid Technologies Incorporation
Nguyen Viet Q
LandOfFree
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