Method and apparatus for supporting multiple floating point proc

Details Method and apparatus for supporting multiple floating point proc Method and apparatus for supporting multiple floating point proc

1996-06-28

2000-08-22

Maung, Zarni

Electrical computers and digital processing systems: processing

Processing control

Arithmetic operation instruction processing

712220, 708500, 708551, 708552, G06F 15177

Patent

active

061087726

ABSTRACT:
A numerical processing method on a computer system in which an instruction having at least one operand and a type control is retrieved, and the operand is converted to a precision specified by the type control. The instruction is executed in the precision specified by the type control to obtain a result, and when the destination precision differs from the precision specified by the type control, the result is converted to the destination precision using a second instruction.

REFERENCES:
patent: 4823260 (1989-04-01), Imel et al.
patent: 4847802 (1989-07-01), Ashton
patent: 5201056 (1993-04-01), Daniel et al.
patent: 5307301 (1994-04-01), Sweedler
patent: 5481686 (1996-01-01), Dockser
patent: 5487022 (1996-01-01), Simpson et al.
patent: 5673407 (1997-09-01), Poland
"IEEE Standard for Binary Floating-Point Arithmetic", IEEE Standards Board, STD 754-1985.

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