Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-10
2007-07-10
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
10857278
ABSTRACT:
A technology for promoting distribution of IPs which constitute part of an integrated circuit is provided. An LSI maker concludes a contract for business alliance with an IP provider, acquires data on IPs from the IP provider, conducts layout, wiring, and verification of the acquired IPs, registers verified IPs into a library, and presents the same to a set maker. When the set maker orders for manufacturing of an LSI to the LSI maker, the LSI maker designs the logic of the integrated circuit, conducts layout, wiring, and timing simulation, and have evaluations from the set maker. Then, the LSI maker manufactures LSIs, delivers the same to the set maker, and receives the payment. The LSI maker calculates license fees, and pays them to the IP provider.
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Office Action for Japanese Application No. 2003-133755 dated Apr. 24, 2007.
Fujisawa Masanori
Mabuchi Shigeki
Chiang Jack
Parihar Suchin
Rohm & Co., Ltd.
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