Chemistry: electrical and wave energy – Apparatus – Electrolytic
Reexamination Certificate
2000-03-02
2002-08-13
Dawson, Robert (Department: 1712)
Chemistry: electrical and wave energy
Apparatus
Electrolytic
C204S229800, C204S230200, C204S230800, C204S286100
Reexamination Certificate
active
06432282
ABSTRACT:
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The invention relates to supplying electrical contacts for applying electrical power to a substrate in a metal depositing system. More particularly, the invention relates to a method and apparatus for uniformly applying electricity to a workpiece in an electroplating system.
2. Description of the Background Art
Sub-quarter micron, multi-level metallization is an important technology for the next generation of ultra large scale integration (ULSI). Reliable formation of these interconnect features permits increased circuit density, improves acceptance of ULSI, and improves quality of individual processed wafers. As circuit densities increase, the widths of vias, contacts and other features, as well as the width of the dielectric materials between the features, decrease. However, the height of the dielectric layers remains substantially constant. Therefore, the aspect ratio for the features (i.e., their height or depth divided by their width) increases. Many traditional deposition processes, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD), presently have difficulty providing uniform features having aspect ratios greater than 4/1, and particularly greater than 10/1. Therefore, a great amount of ongoing effort is directed at the formation of void-free, nanometer-sized features having aspect ratios of 4/1, or higher.
Electroplating, previously limited in integrated circuit design to the fabrication of lines on circuit boards, is being used to fill vias and contacts. Metal electroplating, in general, can be achieved by a variety of techniques. One embodiment of an electroplating process involves initially depositing a barrier layer over the feature surfaces of the wafer, depositing a conductive metal seed layer over the barrier layer, and then depositing a conductive metal (such as copper) over the seed layer to fill the structure/feature. Finally, the deposited layers are planarized by, for example, chemical mechanical polishing (CMP), to define a conductive interconnect feature.
Damascene processes comprise those processes in which metal conductive layers are applied to fill troughs formed in insulative material. The surface of the metal conductive material is then etched to provide a smooth-surfaced insulated conductor formed in the insulative material. Effectiveness and success of the damascene and dual-damascene processes (that are used in such applications as fabricating highly conductive copper wiring on silicon wafers) depends largely upon the uniformity of copper layers deposited. The effectiveness also depends on the partial removal of the copper layer by chemical-mechanical polishing.
In electroplating, depositing of a metallic layer is accomplished by delivering electric power to the seed layer and then exposing the wafer-plating surface to an electrolytic solution containing the metal to be deposited. The subsequently deposited metal layer adheres to the seed layer (as well as a conformal layer) to provide for uniform growth of the metal layer. A number of obstacles impair consistently reliable electroplating of metal onto wafers having nanometer-sized, high aspect ratio features. These obstacles include non-uniform power distribution and current density to across the wafer plating surface.
In metal deposition systems, several things may lend to uneven depositing of the metal layer. One major contributor to a non-uniform deposition of process time dependent variations in material buildup upon the different contacts
56
. Each contact will thus develop unique and unpredictable geometric profiles and densities, thus producing varying and unpredictable resistances when exposed to a similar voltage. The varying resistance of the individual contacts
56
results in a non-uniform current density distribution across the wafer. The varying resistances of the contacts provide modified electrical fields. In addition, the contact resistance at the contact/seed layer interface may vary from wafer
48
to wafer, resulting in inconsistent plating distribution between different wafers using the same equipment.
The power supply circuit that supplies current to the seed layer includes the plurality of contacts
56
located on a contact ring. In electroplater embodiments, a single power supply applies electricity to a junction that is electrically connected to all of the metal contacts
56
. The electrical characteristics of different contacts may vary, especially after prolonged use. Those metal contacts having a higher resistance provide less electrical current to the adjacent seed layer. If an equal voltage is applied to each metal contact, these contacts with increased resistance also have a higher current flowing therethrough as indicated by Ohm's law. Non-uniform power distribution and current desities are applied to the seed layer across the wafer plating surface as a result of the varied electrical current applied by the contacts. This inequality of non-uniform power distribution and current densities results in uneven deposition of metal to the seed layer.
Therefore, there remains a need for an apparatus that delivers a uniform electric current to multiple contacts, and to a seed layer deposited on a wafer. such a device would provide substantially uniform electrical power distribution to a wafer surface n an electroplating cell, enabling deposition of reliable and consistent conductive metallic layers on wafers.
SUMMARY OF THE INVENTION
The present invention generally provides a method and apparatus that supplies electricity to a substrate. In one embodiment, the device includes multiple contacts, a current sensor, and a current regulator. The current sensor is attached to each of the plurality of contacts to sense their electric current. A current regulator controls current applied to each of the multiple contacts in response to a signal produced by the current sensor.
In another embodiment, a compliant ridge is formed about the periphery of each contact that can form a seal about the contacts. The compliant ridge may be formed by either applying a thick conductor layer resulting in a ridge defined in an external surface of the conformal layer. Alternately, the compliant ridge may be formed as an additional layer.
REFERENCES:
patent: 5156730 (1992-10-01), Bhatt et al.
patent: 5503730 (1996-04-01), Osano et al.
patent: 5885469 (1999-03-01), Kholodenko et al.
patent: 6071388 (2000-06-01), Uzoh
patent: WO 99/25905 (1999-05-01), None
Clinton Jon
Kumar Anada H.
Leon Ricardo
Olgado Donald J.
Shamouilian Shamouil
Applied Materials Inc.
Dawson Robert
Feely Michael J
Moser Patterson & Sheridan LLP
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