Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Patent
1998-07-30
2000-06-20
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
438106, H01L 2144
Patent
active
060777265
ABSTRACT:
A semiconductor device (10) includes a bump structure that reduces stress and thus reduces passivation cracking and silicon cratering that can be a failure mode in semiconductor manufacturing. The stress is reduced by forming a polyimide layer (16) over a passivation layer (14). The polyimide layer (16) is extended beyond an edge of the passivation layer (14) over the metal pad (12). A solder bump (22) is composed of a eutectic material and is formed on the metal pad (12) and on the polyimide layer (16). The polyimide layer (16) prevents the solder bump (22) from contacting the passivation layer (14). This is useful for electroless or electroplating technology and may also be useful in other types of bump forming technology such as C4 and E3.
REFERENCES:
patent: 4048438 (1977-09-01), ZImmerman
patent: 5744382 (1998-04-01), Kitayama et al.
Carney George F.
Kleffner James H.
Mistry Addi Burjorji
Sarihan Vijay
Hill Daniel D.
Jr. Carl Whitehead
Motorola Inc.
Potter Roy
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