Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-07-08
2008-07-08
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07398498
ABSTRACT:
Some embodiments of the invention provide a method that pre-computes routes for groups of related net configurations. These routes are used by a router that uses a set of partitioning lines to partition a region of a design layout into a plurality of sub-regions. The method identifies groups of related sub-region configurations. For each group, the method stores a base set of routes. For each configuration in each group, the method also stores an indicia that specifies how to obtain a related set of routes for the particular configuration from the base set of routes stored for the configuration's group.
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Ganley Joseph L.
Teig Steven
Adeli & Tollen LLP
Bowers Brandon W
Cadence Design Systems Inc.
Chiang Jack
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