Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Reexamination Certificate
2005-02-01
2005-02-01
Peikari, B. James (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Slip control, misaligning, boundary alignment
C711S144000, C711S156000, C710S074000, C370S476000
Reexamination Certificate
active
06851035
ABSTRACT:
An apparatus for storing packets. The apparatus includes a memory for holding packets. The apparatus includes a mechanism for storing at least two packets in the memory with only one packet boundary indicator associated with them. A method for storing packets. The method includes the steps of receiving packets at a memory. Then there is the step of storing with a memory controller at least two packets in the memory with only one packet boundary indicator associated with them.
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Bianchini, Jr. Ronald P.
Zhou Fan
Marconi Communications Inc.
Peikari B. James
Schwartz Ansel M.
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