Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Patent
1998-09-11
2000-10-17
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
711150, 711152, G06F 1200, G06F 1214
Patent
active
061346365
ABSTRACT:
A method and apparatus for storing, locking, and unlocking data in a memory array. The memory array includes a first line to store a first type of data while the first line is unlocked during a first period of time and to store a second type of data while the first line is locked during a subsequent second period of time. The memory array further includes a second line to store the second type of data while the second line is locked during the first period of time and to store the first type of data while the second line is unlocked during the second period of time.
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Cheong Fu John Wai
Mathews Gregory Scott
Mulla Dean Ahmad
Cabeca John W.
Intel Corporation
Kaplan David J.
Peugh Brian R.
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