Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration
Reexamination Certificate
1999-01-04
2002-03-19
Butler, Dennis M. (Department: 2182)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
C713S100000
Reexamination Certificate
active
06360319
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates generally to storing and retrieving system revision information and, in particular, for upgrading computer system hardware on a printed circuit board with the system revision information.
A computing system generally includes hardware, the actual physical components of the system, and software, the non-hardware components (i.e., programs) used to perform the intended tasks of the system. Software stored in a programmable memory and executed at start up of the system is generally referred to as “firmware”.
With the rapid change in computer technology, it is often the case that a computer system requires “upgrading.” That is, newer and better hardware or software is substituted for the hardware or software being used on the system. Upgrading is also performed in order to fix “bugs” or other problems with an earlier version of the software.
During the development of a new computer system, the ability to make upgrades to the system is especially critical. In these new systems, changes to the manner in which different components of the system communicate with each other and the speeds at which they do so may be changed. For example, the main printed circuit board of a computer system (often referred to as the “motherboard”) generally contains one or more communication buses, a microprocessor, input/output peripheral device controller and interfaces. As these changes are introduced and tested, (e.g., through engineering change orders (ECOs), or temporary change orders (TCOs)) it is vital that the present status of the system and its hardware and the manner in which it is being operated be known. This is particularly important in the development of new products where new features are being tested and introduced at a rapid rate.
One approach for introducing new upgrades to a system is through the use of a programmable device installed on the board to keep track of the type and revision status of the system. The programmable device, however, generally contains other system information relating to the system's functionality. The programmable device would also be responsible for the control of other system functions, such as programming of EPROMs and updating the “time of day” stamp. However, whenever the system is updated by the programmable device with system revisions and upgrades, the system's timing specifications (e.g., setup and hold times) are at risk of being violated and register performance maybe impacted.
One solution to this problem is to replace the programmable logic devices with application specific integrated circuits (ASICs). As is well known in the art, an ASIC is an integrated circuit designed to perform a particular function by defining the interconnection of a set of basic building blocks drawn, for example, from a library provided by the circuit manufacturer. Because an ASIC is designed for a specific purpose, reliability and performance is generally increased while simultaneously providing a cost reduction. Unfortunately, however, an ASIC device is not reprogrammable when a system or board change/upgrade is implemented.
SUMMARY OF THE INVENTION
The invention relates to a method and a control device for upgrading computer system hardware, e.g., mounted on a printed circuit board) with system revision information.
In a general aspect of the invention, the method features the steps of receiving a serial data stream including data bits associated with the system revision information through a serial input of the control device (e.g., an ASIC device), determining the start of the data its, and storing at least a portion of the data bits associated with the system revision information within a read-only register of the control device.
In a related aspect of the invention, a control device is configured to be mounted on the printed circuit board and includes a serial input for receiving a serial data stream including data bits associated with the system revision information; logic circuitry for receiving the serial data stream from the serial input, and a read-only register for storing the set of data bits associated with the system revision information.
With this approach and arrangement, an efficient and reliable approach for updating system revision information of the computer system hardware on a printed circuit board is provided. The method and apparatus described above have other advantages. For example, because the method receives the system revision information serially (rather than in parallel), only a single serial input is required by the control device to receive the data. Thus, other inputs (e.g., terminal pins) of the control device are free to be used to perform other functionality of the control device, thereby making the control device a shared resource device. Moreover, because the register is a read-only register, any risk that the contents can be overwritten by the user is eliminated.
Embodiments of these aspects of the invention may include one or more of the following additional steps.
A header is appended to the beginning of the set of data bits associated with the system revision information, so that the control device can identify the beginning of the set of data bits and distinguish it from other sets of system revision information in the serial data stream.
The data bits associated with the system revision information are sent as pairs of repeated data bits having the same logical value. By checking to see whether both bits of a pair have the same logical value, the method and control device having this feature minimizes the risk that errors are introduced during the transmission of the data.
In one embodiment, the first of the pair of bits is stored, for example in a temporary, shadow register. For example, the first bit is stored into the read-only register from the second register upon verification of the set of data bits and reading a next header associated with a next set of data bits.
The invention is particularly advantageous when the control device is a shared-resource control device providing additional functionality to the computer system hardware on the printed circuit board. The control device is a non-programmable device, preferably an application specific integrated circuit (ASIC) or masked programmed field programmable grid array (FPGA).
Other features of the invention will be apparent from the following description of the preferred embodiments and from the claims.
REFERENCES:
patent: 5325368 (1994-06-01), James et al.
patent: 5343478 (1994-08-01), James et al.
patent: 5530895 (1996-06-01), Enstrom
patent: 5794066 (1998-08-01), Dreyer et al.
patent: 5867714 (1999-02-01), Todd et al.
patent: 5974474 (1999-10-01), Furner et al.
Arsenault Brian
Tung Victor W.
Butler Dennis M.
Daly, Crowley & Mofford LLP
EMC Corporation
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