Method and apparatus for state-independent...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing

Reexamination Certificate

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C709S237000

Reexamination Certificate

active

06625674

ABSTRACT:

TECHNICAL FIELD
The present invention relates in general to a data processing system and, in particular, to the passing of data between software resources, and the assurance of data integrity therein, in data processing systems.
BACKGROUND INFORMATION
Communicating software resources within a data processing system may need to pass data among themselves. If the software resources do not have an interrupt mechanism or a polling mechanism, the only way to transfer data from a first software resource to a second software resource is for the first software resource to leave the data for the software for the second software resource to collect.
If, however, the data is simply left at a location known both to the first and second resources, there is no assurance that data integrity is maintained. The second software resource may attempt to collect the data it requires before the first software resource has stored the information. In such a case, the data value collected by the second software resource will be erroneous, and there is no mechanism to inform either the first resource or the second resource that the data value is erroneous. Moreover, even if the second resource gathers the data after it has been stored by the first resource, there is no mechanism to ensure that an error in reading the data has not occurred.
Therefore, there is a need in the art for a mechanism which ensures data integrity when data is passed between communicating software resources that have no interrupt or polling mechanisms. In particular, there is a need in the art for a mechanism that informs the receiving software that valid data is available, and which includes a mechanism allowing the sending software to determine when the receiving software has suffered a read error.
SUMMARY OF THE INVENTION
The aforementioned needs are addressed by the present invention. Accordingly, there is provided, in a first form, a method of non-interrupt-driven handshake with positive acknowledgment. The method includes the steps of writing a data value to a first register field, and setting a write signal in a second register field. Also included are the steps of reading the write signal, and, if the write signal is set, reading the data value, and setting an acknowledge signal to a first predetermined value in a third register field, wherein the acknowledge signal signals a first resource that a second resource has attempted a read of the data value.
There is also provided, in a second form, a data processing system for non-interrupt-driven handshake with positive acknowledgment. The data processing system circuitry operable for writing a data value to a first register field, and setting a write signal in a second register field. The data processing system also includes circuitry operable for reading the write signal, and, if the write signal is set, reading the data value, and setting an acknowledge signal to a first predetermined value in a third register field, wherein the acknowledge signal signals a first resource that a second resource has attempted a read of the data value.
Additionally, there is provided, in a third form, a computer program product operable for non-interrupt-driven handshake with positive acknowledgment, wherein the program product operable for storage on machine readable storage media includes programming for writing a data value to a first register field, and setting a write signal in a second register field. Further included is programming for reading the write signal, and, if the write signal is set, reading the data value and setting an acknowledge signal to a first predetermined value in a third register field, wherein the acknowledge signal signals a first resource that a second resource has attempted a read of the data value.


REFERENCES:
patent: 4827115 (1989-05-01), Uchida et al.
patent: 5479582 (1995-12-01), Abrams
patent: 5983303 (1999-11-01), Sheafor et al.
patent: 6012142 (2000-01-01), Dokic et al.
patent: 6134607 (2000-10-01), Frink
patent: 6145007 (2000-11-01), Dokic
M. Morris Mano, “Computer System Architecture”, 1982, Prentice-Hall, pp. 428—434.

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