Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-12-04
2007-12-04
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C703S016000, C703S018000
Reexamination Certificate
active
11055863
ABSTRACT:
A method, an apparatus and computer instructions are provided for specifying multiple voltage domains of a signal and macros in a processor chip and validating physical implementation and interconnections of the signal and macros. A set of attributes is provided for designs to define multiple voltage domains of a signal and macros in a processor chip. A first validation mechanism is then provided to validate that no electrical or logical errors created by logical connections between macros as defined by the set of attributes. A translation mechanism is provided to translate logical voltage description to a physical netlist for designers to connect powers to macros and signals. A second validation mechanism is provided to validate physical implementation adhere to designers' intent according to the set of attributes defined in the logical design.
REFERENCES:
patent: 6086628 (2000-07-01), Dave et al.
patent: 6097886 (2000-08-01), Dave et al.
patent: 6112023 (2000-08-01), Dave et al.
patent: 6132109 (2000-10-01), Gregory et al.
patent: 6230303 (2001-05-01), Dave
patent: 7134099 (2006-11-01), Collins et al.
patent: 7146303 (2006-12-01), Roy et al.
patent: 7152216 (2006-12-01), Kapoor et al.
patent: 2004/0172232 (2004-09-01), Roy et al.
patent: 2005/0102644 (2005-05-01), Collins et al.
patent: 2005/0278676 (2005-12-01), Dhanwada et al.
patent: 2006/0085770 (2006-04-01), Kapoor et al.
Singh et al., “Multi-port equivalencing of external systems for simulation of switching transients”, IEEE Transactions on Power Delivery, vol. 10, No. 1, Jan. 1995, pp. 374-382.
Gothenberg et al., “Performance analysis of sampling switches in voltage and frequency domains using Volterra series”, Proceedings of the 2004 International Symposium on Circuits and Systems, vol. 1, May 23-26, 2004, pp. l765-l768.
Floyd Michael Stephen
Friedrich Joshua David
Huston Elspeth Anne
Roesner Wolfgang
Weiss Rick John
Gerhardt Diana R.
Kik Phallaka
Kinslow Cathrine K.
Yee Duke W.
LandOfFree
Method and apparatus for specifying multiple voltage domains... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for specifying multiple voltage domains..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for specifying multiple voltage domains... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3838674