Method and apparatus for specifying address offsets and...

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C711S202000, C711S210000, C711S212000, C711S220000

Reexamination Certificate

active

06658547

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the field of logic design. More specifically, the present invention is directed to a method and an apparatus for specifying address offsets and alignment for memory-mapped device.
BACKGROUND
Logic designers use hardware description language (HDL) or schematic capture to model a circuit at different level of abstractions. The circuit model is synthesized to construct a gate-level netlist.
Traditional electronic design automation tool flows require the logic designer to specify fixed addresses for each component in the system. To the extent that a component has internal addressing requirements, such as a set of contiguous registers, or address alignment requirements, the logic designer has been required to explicitly specify the addressability of each component of the device such that it meets those offset and alignment requirements. However, this requirement may be difficult for the logic designer when address relationships become complicated.
SUMMARY OF THE INVENTION
In one embodiment, a method for asserting an address alignment of an address for a memory-mapped device in a logic design is disclosed. An align primitive comprising an alignment size port, an input address port and an output address port is used. The alignment size port has data indicating a desired address boundary. The input address port is used for an address to be verified against the desired address boundary. The output address port is used to provide an address that is on the desired address boundary. The address to be verified against the desired address boundary is provided at the output address port when that address meets the desired address boundary.
Other features and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description which follows.


REFERENCES:
patent: 4947366 (1990-08-01), Johnson
patent: 5666508 (1997-09-01), Marshall, Jr.
patent: 5835926 (1998-11-01), Pesuit
patent: 6026239 (2000-02-01), Patrick et al.
patent: 6449706 (2002-09-01), Chen et al.
patent: 6457115 (2002-09-01), McGrath
patent: W/O 00/22546 (2000-04-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for specifying address offsets and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for specifying address offsets and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for specifying address offsets and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3175188

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.