Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2006-05-02
2006-05-02
An, Meng-Al T. (Department: 2195)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C707S793000
Reexamination Certificate
active
07039915
ABSTRACT:
An architecture and method for dynamic resource allocation and scheduling in a communication device is disclosed herein. The method of controlling hardware resources in a communication device having a processor, a computer readable memory, and at least one hardware resource coupled to each other includes several steps. The first step locates a memory address in the computer readable memory that is associated with a first hardware resource. In the next step, control information associated with the first memory address is transmitted to the first hardware resource for it to be operated. In the last step, a pointer associated with the first address that locates a subsequent address for a subsequent hardware resource, is read.
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Holmes David M.
Kavoori Chakki
Reiken Keith
Ali Syed J
An Meng-Al T.
Darby & Darby
Infineon - Technologies AG
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