Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent
1997-10-28
1999-05-25
Le, Vu A.
Static information storage and retrieval
Read/write circuit
Simultaneous operations
365154, 36523005, G11C 700
Patent
active
059075082
ABSTRACT:
The data processing system of the present invention implements a multi-port memory cell and control therefor. In response to a single clock signal, the cell is accessed during multiple, non-concurrent intervals during a single clock cycle. Each of the accesses during the clock cycle are over a different line.
REFERENCES:
patent: 4366558 (1982-12-01), Homma et al.
patent: 4608669 (1986-08-01), Klara et al.
patent: 4803663 (1989-02-01), Miyamoto et al.
patent: 4980860 (1990-12-01), Houston et al.
patent: 5107459 (1992-04-01), Chu et al.
patent: 5144583 (1992-09-01), Oowaki et al.
patent: 5214601 (1993-05-01), Hidaka et al.
patent: 5292678 (1994-03-01), Dhong et al.
patent: 5459851 (1995-10-01), Nakajima et al.
patent: 5468985 (1995-11-01), Harima
patent: 5563820 (1996-10-01), Wada et al.
patent: 5567963 (1996-10-01), Rao
patent: 5581126 (1996-12-01), Moench
patent: 5586072 (1996-12-01), Longway et al.
patent: 5699300 (1997-12-01), Akamatsu et al.
patent: 5726950 (1998-03-01), Okamoto et al.
Lattimore George McNeil
Ross, Jr. Robert Anthony
Smadi Mithkal Moh'd
England Anthony V.S.
International Business Machines - Corporation
Le Vu A.
LandOfFree
Method and apparatus for single clocked, non-overlapping access does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for single clocked, non-overlapping access , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for single clocked, non-overlapping access will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-405353