Static information storage and retrieval – Addressing – Multiple port access
Patent
1990-04-05
1993-04-13
Fears, Terrell W.
Static information storage and retrieval
Addressing
Multiple port access
36518904, 36518902, G11C 1300
Patent
active
052028569
ABSTRACT:
A memory system having multiple memories and multiple ports. Multiplexing logic couples each of the ports to each of the memories. A sequencing circuit controls the multiplexers so that each port is sequentially coupled to each of the memories in sequence in a repeating cycle. When coupled to each memory, a block of data is transferred. A second port is coupled to a different memory at each point in time, with the two ports being switched simultaneously to avoid overlap. A port desiring access to the system must wait until it can fit into this switching queue so that it can transfer in lock-step with the other ports to a different memory. Each port has a data I/O bus, an address input bus, an address counter and R/W controls.
REFERENCES:
patent: 3303482 (1987-02-01), Jenkins
patent: 3544777 (1970-12-01), Winkler
patent: 3693159 (1972-09-01), Hilberg
patent: 3772652 (1973-11-01), Hilberg
patent: 3803560 (1974-04-01), DeVoy et al.
patent: 3905023 (1975-09-01), Perpiglia
patent: 3917933 (1975-11-01), Scheuneman et al.
patent: 4070704 (1978-01-01), Calle et al.
patent: 4093985 (1978-06-01), Das
patent: 4207609 (1980-06-01), Luiz et al.
patent: 4339804 (1982-07-01), Davison et al.
patent: 4342079 (1982-07-01), Stewart et al.
patent: 4464747 (1984-08-01), Groudan
patent: 4467421 (1984-08-01), White
patent: 4468731 (1984-08-01), Johnson et al.
patent: 4507730 (1985-03-01), Johnson et al.
patent: 4667326 (1987-05-01), Young et al.
patent: 4722085 (1988-01-01), Flora et al.
patent: 4761785 (1988-08-01), Clark et al.
patent: 4768193 (1988-08-01), Takamae
patent: 4811296 (1989-03-01), Garde
patent: 4814982 (1989-03-01), Weir
patent: 4817035 (1989-03-01), Timsit
patent: 4825403 (1989-04-01), Gershenson et al.
patent: 4849929 (1989-07-01), Timsit
patent: 4914656 (1990-04-01), Dunphy et al.
Blum, "Fast Access Disk File with Several Parallel Heads", IBM Technical Disclosure Bulletin, vol. 25, No. 6, Nov. 1982.
W. Jilke, "Disk Array Mass Storage Systems: The New Opportunity," Amperif Corporation, Sep. 30, 1986.
W. Jilke, "Economics Study of Disk Array Mass Storage Systems: The Cost Reduction Opportunity," Amperif Corporation, Mar. 24, 1987.
Michelle Y. Kim, "Synchronized Disk Interleaving," IEEE Transactions on Computers, vol. C-35 No. 11, Nov. 1986.
D. Lieberman, "SCSI-2 Controller Board Builds Parallel Disk Drive Arrays," Computer Design, vol. 28, No. 7, Apr. 1, 1989, pp. 32, 36.
W. Meador, "Disk Array Systems," Spring COMPCON 89 Digest of Papers, IEEE Computer Society Press, pp. 143-146.
T. Olson, "Disk Array Performance in a Random IO Environment," Computer Architecture, vol. 17, No. 5, Sep. 1989, pp. 71-77.
D. Patterson et al., "A Case for Redundant Arrays of Inexpensive Disks (RAID)," Report No. UCB/CSD 87/391, Dec. 1987.
Product Description, Micropolis 1804 SCSI Parallel Drive Array, Document No. 108120 Rev. A.
Program Summary, DataStorage 86, An International Forum, Sep. 22-24, 1986, Red Lion Inn, San Jose, Calif.
H. Sierra, "Assessing the Promise of Disk Arrays," Canadian Datasystems, May 1989, pp. 52-53.
D. Simpson, "RAIDs vs. SLEDs." Systems Integration, Nov. 1989, pp. 70-82.
Mike Sisley, "Microprogram Development Technique Adds Flexibility," New Electronics, vol. 17, No. 23 Nov. 27, 1984, pp. 35-38.
J. Voelker, "Winchester Disks Reach for a Gigabyte," IEEE Spectrum, Feb. 1987, pp. 64-67.
Asato Edward E.
Glider Joseph S.
Shah Kaushik S.
Fears Terrell W.
Micro Technology Inc.
LandOfFree
Method and apparatus for simultaneous, interleaved access of mul does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for simultaneous, interleaved access of mul, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for simultaneous, interleaved access of mul will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1159982