Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2007-03-20
2007-03-20
Portka, Gary (Department: 2188)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S147000, C711S203000, C711S207000
Reexamination Certificate
active
11316788
ABSTRACT:
A sharing mechanism is herein disclosed for multiple logical processors using a translation lookaside buffer (TLB) to translate virtual addresses, for example into physical addresses. The mechanism supports sharing of TLB entries among logical processors, which may access address spaces in common. The mechanism further supports private TLB entries among logical processors, which for example, may each access a different physical address through identical virtual addresses. The sharing mechanism provides for installation and updating of TLB entries as private entries or as shared entries transparently, without requiring special operating system support or modifications. Through use of the disclosed sharing mechanism, fast and efficient virtual address translation is provided without requiring more expensive functional redundancy.
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Willis Thomas E.
Zahir Achmed R.
Intel Corporation
Mennemeier Lawrence
Portka Gary
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