Method and apparatus for setting status of cache memory

Details Method and apparatus for setting status of cache memory Method and apparatus for setting status of cache memory

2008-08-25

2011-11-01

Kim, Hong (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S144000, C711S146000

Reexamination Certificate

active

08051251

ABSTRACT:
One aspect of the embodiments utilizes a system controller which has a broadcast transmitting and receiving unit that receives a memory access request from each of CPU and notifies to the other system controllers and a snoop control unit that judges when the memory access request from any of the CPUs for each of the cache memories in the CPU is received, whether object data conflicts with object data requested by a prior access request received earlier than the memory access request and whether the object data is present in any of the cache memories, selects the status of the cache memory of the CPU, notifies the other system controller of a snoop processing result in which the status selected and the cache memory are associated, and set a final status as the status of the system controller based on priority of each status of other system controllers.

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