Static information storage and retrieval – Read/write circuit
Patent
1990-07-17
1992-10-20
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
36518903, 365201, G11C 1300
Patent
active
051576279
ABSTRACT:
A desired signal level is set at select storage elements of an integrated circuit without relying on signals applied to the primary input pins of the integrated circuit. Instead, a signal is applied through a test matrix to the input, output or internal line of a select storage element. With the drive of the applied signal being greater than the drive of the signals occurring at the select storage element of the integrated circuit, the applied signal level magnitude is forced upon the storage element. Once the drive of the applied signal is reduced relative to the drive of the storage element signals so as to be less than or equal to the drive of the storage element signals, the output level of the select storage element remains at the desired level. According to one embodiment, the power supply of the test electronics which generates the applied signal is of greater magnitude than the integrated circuit power supply at power up during the state-setting operation to achieve the greater relative drive. During a state-observing operation, the power supply voltage of the test electronics is approximately equal to the power supply voltage of the integrated circuit so as not to inadvertently change the output state of the select storage element.
REFERENCES:
patent: 3761675 (1973-09-01), Mason et al.
patent: 3795859 (1974-03-01), Benante et al.
patent: 3806891 (1974-04-01), Eichelberger et al.
patent: 4293919 (1981-10-01), Dasgupta et al.
patent: 4513418 (1985-04-01), Bardell, Jr. et al.
patent: 4517672 (1985-05-01), Pfleiderer et al.
patent: 4613970 (1986-09-01), Masuda et al.
patent: 4749947 (1988-06-01), Gheewala
"Design for Testability -A Survey", by T. W. Williams, et al., Proceedings IEEE, vol. 71, pp. 359-416, Jan. 1983.
"A Logic Design Structure for LSI Testability", Eichelberger, et al., Proceedings -th Design Automation Conf., Jun., 1977.
"Built-in Self-Test Techniques" by E. J. McClusky, IEEE Design and Test, vol. 2, No. 2, pp. 21-28.
"Built-in Self-Test Structures" by E. J. McClusky, IEEE Design and Test, vol. 2, No. 2, pp. 29-36.
"Voltage Checking Device" by G. Canard and A. Potocki, IBM Technical Disclosure Bulletin, vol. 8, No. 5, Oct. 1965.
Cross-Check Technology, Inc.
Fears Terrell W.
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