Method and apparatus for setting cache policies in a processor

Details Method and apparatus for setting cache policies in a processor Method and apparatus for setting cache policies in a processor

2011-05-24

2011-05-24

Farrokh, Hashem (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S134000, C711S145000

Reexamination Certificate

active

07949834

ABSTRACT:
According to the methods and apparatus taught herein, processor caching policies are determined using cache policy information associated with a target memory device accessed during a memory operation. According to one embodiment of a processor, the processor comprises at least one cache and a memory management unit. The at least one cache is configured to store information local to the processor. The memory management unit is configured to set one or more cache policies for the at least one cache. The memory management unit sets the one or more cache policies based on cache policy information associated with one or more target memory devices configured to store information used by the processor.

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International Search Report—PCT/US08/051953, International Search Authority—European Patent Office—Jun. 20, 2008.
Written Opinion—PCT/US08/051953, International Search Authority—European Patent Office—Jun. 20, 2008.

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