Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2003-08-29
2009-12-15
Tran, Denise (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C710S244000, C365S230040, C365S230080
Reexamination Certificate
active
07634623
ABSTRACT:
A self-timed data ordering method and circuit for multi-data rate memories orders a plurality of data words substantially simultaneously retrieved during successive read operations of a memory device. A data word ordering designator is stored from each of the successive read operations and managed in a first-in first-out manner. The data word ordering designator configures ordering circuitry for the desired ordering of the plurality of data words simultaneously retrieved. Following the ordering of the plurality of data words, the properly ordered data words are latched in their desired order for subsequent delivery. Once the properly ordered data words are latched, the ordering circuitry is reconfigured according to the next oldest data word ordering designator. The data word ordering designator retains the pipelined ordering of the corresponding read operations to the corresponding memory banks of the memory device.
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Micro)n Technology, Inc.
Tran Denise
TraskBritt
LandOfFree
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