Electrical computers and digital processing systems: support – Synchronization of plural processors
Reexamination Certificate
2007-01-09
2010-02-09
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of plural processors
C713S001000, C713S002000, C713S100000, C714S100000, C712S001000, C712S002000, C712S003000, C712S010000, C712S011000, C712S015000, C712S021000, C712S022000, C712S033000
Reexamination Certificate
active
07661006
ABSTRACT:
A computer implemented method, apparatus, and computer program product for managing symmetric multiprocessor interconnects. The process identifies functional communication connections between each processor in a plurality of processors on a multiprocessor to form identified functional communication connections. The process maps every functional communication connection between any two processors in the plurality of processors, based on the identified functional communication connections, to form an interconnect matrix. The process creates a path map using the interconnect matrix. The path map comprises a sequence of communication connections between the plurality of processors. The process initializes the plurality of processors using the path map.
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Abou-Emara Luai A.
McLaughlin Mark David
Yanez Jorge N.
Henson James
International Business Machines - Corporation
Lee Thomas
Talpis Matthew B.
Yee & Associates P.C.
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