Coded data generation or conversion – Converter calibration or testing
Patent
1988-06-22
1990-01-23
Shoop, Jr., William M.
Coded data generation or conversion
Converter calibration or testing
341156, 341159, H03M 110
Patent
active
048961558
ABSTRACT:
A subranging analog-to-digital (A/D) converter is provided with a calibration mode for linearity correction. In the calibration mode, an up/down calibration counter provides a digital input to a calibration logic circuit and to an estimator digital-to-analog (D/A) converter. The analog output of the estimator D/A converter is provided as an inverted input to a residue operational amplifier, and is combined with a dither noise signal for input to a sample-and-hold circuit. The output of the sample-and-hold circuit is provided to a noninverting input of the residue operational amplifier. The operational amplifier provides an analog residue signal to a residue A/D converter that generates a digital residue signal for input to the calibration logic circuit. The calibration logic circuit calculates and stores a linearity correction table based on the average step size computed from the inputs to the calibration logic circuit for each step of the up/down counter. The stored correction table is used to provide linearity correction for the subranging A/D converter when it is operating in the run mode.
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Hamann H. Fredrick
Horn J. J.
Kim Helen
McFarren J. C.
Rockwell International Corporation
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