Method and apparatus for self-adjusting input delay in...

Details Method and apparatus for self-adjusting input delay in... Method and apparatus for self-adjusting input delay in...

2008-04-29

2008-04-29

Portka, Gary (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C365S194000, C711S105000, C713S401000

Reexamination Certificate

active

10987356

ABSTRACT:
A method and apparatus are provided for interfacing with a synchronous dynamic memory in which memory commands are provided to the memory. The memory is accessed in response to the memory commands. Read data is captured in a data capture circuit having a delay setting. The delay setting is updated in response to detection of a period of read inactivity of the memory.

REFERENCES:
patent: 6584021 (2003-06-01), Heyne et al.
patent: 7043611 (2006-05-01), McClannahan et al.
patent: 7106646 (2006-09-01), Schoenfeld et al.
patent: 7165185 (2007-01-01), Li et al.

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