Static information storage and retrieval – Read/write circuit – Having fuse element
Reexamination Certificate
2001-03-13
2002-08-13
Tran, M. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Having fuse element
C365S201000
Reexamination Certificate
active
06434077
ABSTRACT:
BACKGROUND OF THE INVENTION
A system-on-a-chip (“SOC”) semiconductor device often includes Application Specific Integrated Circuit (“ASIC”) logic which implements a plurality of functions. However, all of the provided functions may not be required by all users of the semiconductor device.
Thus, multiple versions of the ASIC logic are typically designed, with a semiconductor device including ASIC logic implementing a subset of all the functions costing less than the semiconductor device including ASIC logic which implements all the functions. Designing multiple versions of the ASIC logic ensures that a user cannot purchase a cheaper version of the semiconductor device and later modify the semiconductor device to create the more expensive semiconductor device which includes the ASIC logic which implements all the functions. However, designing multiple versions of ASIC logic is expensive.
SUMMARY OF THE INVENTION
Multiple configurations of a semiconductor device can be provided from the same physical semiconductor device on a same die. The configuration of the semiconductor device is selected while the accessible memory in the semiconductor device is being tested or after the accessible memory is tested. Once testing and configuration is complete, the semiconductor device is packaged and no further configuration change is possible.
A method and apparatus for configuring logic in a semiconductor device is presented. The semiconductor device includes logic for performing a function and a fuse circuit in an embedded memory. The fuse circuit is coupled to the logic. The fuse circuit has a first state and a second state. The logic is permanently disabled upon transition of the fuse circuit from the first state to the second state.
The fuse circuit is associated with embedded memory fuses. The fuse circuit transitions from the first state to the second state while the embedded memory is being tested or after the embedded memory has been tested.
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Betty Prince, “Semiconductor Memories”, 1983, Wiley, 2ndEdition pp. 127-129.
Hamilton Brook Smith & Reynolds P.C.
Mosaid Technologies Inc.
Tran M.
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