Patent
1995-09-05
1998-04-28
Lim, Krisna
395390, G06F 930
Patent
active
057457263
ABSTRACT:
An instruction selector receives M instructions per clock cycle and stores N instructions in an instruction queue memory. An instruction queue generates a precedence matrix indicative of the age of the N instructions. A dependency checker determines the available registers for executing the instructions ready for execution.
An oldest-instruction selector selects the M oldest instructions responsive to the precedence matrix and the eligible queue entry signals. The instruction queue provides the M selected instructions to execution units for execution. Upon completing the instructions, the execution units provide register availability signals to the dependency checker to release the registers used for the instructions.
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Gmuender John
Maruyama Takumi
Shebanow Michael C.
Simone Michael A.
Szeto John R. F. S.
Fujitsu Ltd
Lim Krisna
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