Static information storage and retrieval – Floating gate – Particular biasing
Patent
1998-06-18
1999-03-30
Nelms, David
Static information storage and retrieval
Floating gate
Particular biasing
36518522, 36518529, 36518533, 365218, G11C 1604
Patent
active
058897011
ABSTRACT:
A novel test procedure is used to determine the optimum programmable charge pump levels for a flash memory array in a CPLD. According to the method of the invention, an automated tester steps through all combinations of charge pump codes and attempts to program the flash memory with each combination of voltage levels. For each combination, the results of the test (pass or fail) are logged and stored into a map or array. The center of a window of passing pump codes is taken as the starting reference point. The next step is to verify the actual voltage level associated with the pump code combination corresponding to the starting reference point. The reference pump code is loaded into the device and the corresponding flash memory cell voltage levels are measured. If the measured voltage level does not fall into the preferred range, the tester automatically adjusts the level towards the preferred range by adjusting the pump codes.
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patent: 5790469 (1998-08-01), Wong
Curd Derek R.
Kang Sunae
Mack Ronald J.
San Luis, Jr. Rafael G.
Cartier Lois D.
Nelms David
Phan Trong
Xilinx , Inc.
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