Method and apparatus for scrubbing memory

Details Method and apparatus for scrubbing memory Method and apparatus for scrubbing memory

2011-03-22

2011-03-22

Chase, Shelly A (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S005110

Reexamination Certificate

active

07913147

ABSTRACT:
Method and apparatus to scrub memory is disclosed. A patrol request, for example a read/write request, may be raised to the memory command scheduler in an out of order memory controller to scrub the memory. The patrol read/write request may be raised as and when patrol interval timer expires. The patrol read/write request may also be raised based on presence of a transaction in-flight to the memory, retry response from the memory command scheduler and correctable or non-correctable error response from the memory command scheduler. An interrupt may be raised to a processor upon completion response from the memory command scheduler.

REFERENCES:
patent: 5511078 (1996-04-01), Barucchi et al.
patent: 6381658 (2002-04-01), Swaminathan
patent: 6766429 (2004-07-01), Bland et al.
patent: 7089461 (2006-08-01), Gilbert et al.
patent: 7346806 (2008-03-01), Forrer et al.
patent: 7650557 (2010-01-01), Totolos, Jr.
Pending U.S. Appl. No. 11/173,641, filed Jun. 30, 2006, inventor Swaminathan et al.
Pending U.S. Appl. No. 11/471,111, filed Jun. 19, 2006, inventor Mitra.

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