Method and apparatus for saving microprocessor power when...

Details Method and apparatus for saving microprocessor power when... Method and apparatus for saving microprocessor power when...

2005-09-13

2005-09-13

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S104000, C711S105000, C711S118000, C711S136000, C711S156000, C711S160000, C713S300000, C713S320000, C713S321000, C713S322000, C713S323000, C713S324000, C365S049130, C365S189050, C365S189070, C365S203000, C365S226000, C365S227000, C365S230060, C365S230090

Reexamination Certificate

active

06944714

ABSTRACT:
An embodiment of the invention provides a circuit and method for reducing power in multi-way set associative arrays. A control circuit detects when the next cache access will be taken from the same cache way that the previous cache access was taken from. If the next cache access is taken from the same cache way as the previous cache access, the control circuit signals all the cache ways, except the cache way that was previously accessed, to not access information from their arrays. The control circuit also signals the tag arrays to not access their information and disables power to all the compare circuits. In this manner, power may be reduced when sequentially accessing information from one cache way in a multi-way set associative array.

REFERENCES:
patent: 6076140 (2000-06-01), Dhong et al.
patent: 2002/0112126 (2002-08-01), Hayakawa et al.
patent: 2004/0010675 (2004-01-01), Moritz
Ma et al., “Way Memoization to Reduce Fetch Energy in Instruction Cache,” Workshop on Complexity-Effective Design, in conjunction with ISCA-28, Jun. 2001.
Powell et al., “Reducing Set-Associative Cache Energy via Way-Prediction and Selective Direct-Mapping,” MICRO'34, 2001.
Kang et al., “CMOS Digital Integrated Circuits Analysis and Design,” McGraw-Hill, Second Edition, 1999, pp. 437-444.

Affiliated with

Also associated with

Rating

Method and apparatus for saving microprocessor power when... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for saving microprocessor power when..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for saving microprocessor power when... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3392074