Method and apparatus for revising wiring of a circuit to...

Details Method and apparatus for revising wiring of a circuit to... Method and apparatus for revising wiring of a circuit to...

2005-11-29

2005-11-29

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06971082

ABSTRACT:
A wiring designing method for electrically connecting a plurality of functional blocks on a semiconductor integrated circuit is disclosed, that comprises the steps of (a) obtaining a wiring branch point among the plurality of functional blocks, (b) obtaining a current density of the obtained wiring branch point, (c) determining whether or not the obtained current density exceeds a predetermined limit value, and (d) performing a process for decreasing a current density of a predetermined wiring portion that ends at the wiring branch portion whose current density exceeds the limit value corresponding to the determined result at the determining step (c).

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patent: 6308310 (2001-10-01), Nakamura
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patent: 6675139 (2004-01-01), Jetton et al.
patent: 10-150107 (1998-06-01), None
patent: 11-97541 (1999-04-01), None
Japanese Office Action dated Mar. 11, 2003, with partial English translation.

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