Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2005-04-26
2005-04-26
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C710S104000, C711S105000, C713S300000
Reexamination Certificate
active
06886105
ABSTRACT:
A method and apparatus for resuming operations from a low latency wake-up low power state. One embodiment provides a system including a processor, an operating system, and a memory subsystem that requires initialization commands to exit a memory low power state. Control logic detects exit from an operating system low latency low power state and responsively generates a plurality of initialization commands to remove the memory subsystem from the memory low power state prior to deasserting a stop clock signal and allowing execution to resume.
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Kahn Opher
Orenstein Doron
Chang Eric
Intel Corporation
Lane Thomas R.
Perveen Rehana
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