Method and apparatus for resetable memory and design...

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S189020, C365S189030, C365S189050, C365S189080, C365S230080, C365S233100

Reexamination Certificate

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06934183

ABSTRACT:
A resetable memory is described that includes a memory without reset capability having a data output coupled to a first input of a first multiplexer. A second input of the first multiplexer has a reset value input. A channel select for the first multiplexer is coupled to a resetable storage cell output that indicates whether a storage cell within the memory without reset capability has been written to after a reset or has not been written to after a reset.

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