Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1997-09-12
1999-06-29
Nelms, David
Static information storage and retrieval
Read/write circuit
Bad bit
365201, 365203, 3652257, 36518513, G11C 700
Patent
active
059177632
ABSTRACT:
A memory array arranged in rows and columns includes a global column line. The global column line has proximal and distal ends and is adapted to enable a predetermined number of columns in the array. A repair circuit connected to the distal end of the global column line is adapted to detect a fault on the global column line and disable the global column line if the fault is detected. A repair circuit for a signal line includes a programming circuit and a sensing circuit. The programming circuit includes a programmable element and is adapted to detect a fault on the signal line and program the programmable element if the fault is detected. The sensing circuit is adapted to detect a programmed condition of the programmable element and ground an end of the signal line in response to the programmed condition. A method for repairing a memory array having a global column line includes detecting a fault on the global column line of the array and disabling the global column line if the fault is detected.
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Micro)n Technology, Inc.
Nelms David
Nguyen Tuan T.
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