Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2008-04-01
2008-04-01
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S105000, C710S040000
Reexamination Certificate
active
07353349
ABSTRACT:
A method and apparatus for reordering memory requests for page coherency. Various data streams are frequently found in separate areas of physical memory (i.e. each data stream is found in a separate memory “page”). Because these requests from different streams become intermixed, a certain amount of latency results from the resulting page “breaks.” These page breaks occur when consecutive requests are from different data streams, requiring accesses to different memory pages. When several separate streams of data are requested by a client, page coherency between requests diminishes. A reordering device regains lost page coherency, thereby reducing the amount of latency and increasing overall system performance.
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Navale Aditya
Sadowsky Jonathan B.
Intel Corporation
Pedigo Philip A.
Peugh Brian R.
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