Method and apparatus for renaming registers corresponding to mul

Details Method and apparatus for renaming registers corresponding to mul Method and apparatus for renaming registers corresponding to mul

1997-03-26

1999-11-30

Chan, Eddie P.

Electrical computers and digital processing systems: processing

Processing control

Context preserving (e.g., context swapping, checkpointing,...

712217, G06F 1300

Patent

active

059960680

ABSTRACT:
A circuit and a scheme for register renaming responsive to a thread ID register, comprises: a plurality of physical registers; a plurality of architectual registers; a rename logic circuit where every write to an architectual register of the plurality of architectural registers is assigned a new physical register of the plurality of physical registers; a register map circuit containing a corresponding entry for each of the plurality of architectual registers. The register map circuit is responsive to the thread ID register such that a different physical map is selected for architectual registers of each thread, whereby the plurality of architectual registers can be greater than the plurality of physical registers.

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Waldspurger, Carl A. et al., Register Relocation: Flexible Contexts for Multithreading; International Symposium on Computer Architecture 20, 1993.
P.R. Nuth et al., A Mechanism for Efficient Context Switching; International Conference on Computer Design--91, 1991.

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