Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1992-09-16
1994-04-19
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Data refresh
36523003, G11C 11401
Patent
active
053052749
ABSTRACT:
A mode control circuit receives a row address strobe signal and a column address strobe signal and generates a normal mode signal when the row address strobe signal is received before the column address strobe signal is received. The mode control circuit generates a refresh mode signal when the row address strobe signal is received not before the column address strobe signal is received. A row addressing circuit addresses a first number of rows of data in response to the normal mode signal and a second, greater number of rows of data in response to the refresh mode signal.
REFERENCES:
patent: 4079462 (1978-03-01), Koo
patent: 4486860 (1984-12-01), Takemae et al.
patent: 4914630 (1990-04-01), Fujishima et al.
patent: 4934826 (1990-06-01), Miyatake et al.
LaRoche Eugene R.
Ngugen Tan
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