Method and apparatus for reducing the effects of hot spots...

Details Method and apparatus for reducing the effects of hot spots... Method and apparatus for reducing the effects of hot spots...

2005-09-20

2005-09-20

Lane, Jack A. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S133000, C711S141000

Reexamination Certificate

active

06948032

ABSTRACT:
One embodiment of the present invention provides a system that uses a hot spot cache to alleviate the performance problems caused by hot spots in cache memories, wherein the hot spot cache stores lines that are evicted from hot spots in the cache. Upon receiving a memory operation at the cache, the system performs a lookup for the memory operation in both the cache and the hot spot cache in parallel. If the memory operation is a read operation that causes a miss in the cache and a hit in the hot spot cache, the system reads a data line for the read operation from the hot spot cache, writes the data line to the cache, performs the read operation on the data line in the cache, and then evicts the data line from the hot spot cache.

REFERENCES:
patent: 5900012 (1999-05-01), Tran
patent: 6154812 (2000-11-01), Hetherington et al.
patent: 6848031 (2005-01-01), Jourdan
patent: 6874056 (2005-03-01), Dwyer et al.

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