Method and apparatus for reducing power consumption in a memory

Details Method and apparatus for reducing power consumption in a memory Method and apparatus for reducing power consumption in a memory

1996-09-27

1998-07-21

Nelms, David C.

Static information storage and retrieval

Read/write circuit

36518907, 365203, G11C 1604, G11C 700

Patent

active

057843201

ABSTRACT:
A write control unit, coupled to a memory cell, for controlling write operations to the memory cell is disclosed. The write control unit includes a write qualification unit that qualifies the write operation. The write qualification unit includes a first input for receiving a first data signal that indicates a current data value of the memory cell. The write qualification unit also includes a second input for receiving a second data signal that indicates a data value to be written to the memory cell. The write qualification unit enables a write operation to the memory cell only if the first data signal is different from the second data signal (i.e., the first data value and the second data value are different). If the first data value and the second data value are the same, the write qualification unit suppresses the write operation.

REFERENCES:
patent: 4811294 (1989-03-01), Kobayashi et al.
patent: 4907189 (1990-03-01), Branson et al.
patent: 5197026 (1993-03-01), Butler
patent: 5287326 (1994-02-01), Hirata
patent: 5497347 (1996-03-01), Feng

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