Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-04-03
2007-04-03
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C714S005110, C714S006130, C714S015000, C711S114000, C711S161000
Reexamination Certificate
active
10693070
ABSTRACT:
A source storage server receives various write requests from a set of clients, logs each request in local memory, and forwards each log entry to a destination storage server at a secondary site. At a consistency point, the source storage server saves data, modified per the requests, to a first set of mass storage devices, and also initiates a synchronization phase during which process the modified data is mirrored at the secondary site. The destination storage server uses data in the received log entries to mirror at least a portion of the modified data in a second set of mass storage devices located at the secondary site, such that said portion of the modified data does not have to be sent from the source storage server to the destination storage server at the consistency point.
REFERENCES:
patent: 5636360 (1997-06-01), Courts et al.
patent: 5687390 (1997-11-01), McMillan, Jr.
patent: 5787485 (1998-07-01), Fitzgerald et al.
patent: 5870537 (1999-02-01), Kern et al.
patent: 6178427 (2001-01-01), Parker
patent: 6226651 (2001-05-01), Masuda et al.
patent: 6308283 (2001-10-01), Galipeau et al.
patent: 6499112 (2002-12-01), Milillo et al.
patent: 6502205 (2002-12-01), Yanai et al.
patent: 6578160 (2003-06-01), MacHardy, Jr. et al.
patent: 6636879 (2003-10-01), Doucette et al.
patent: 6671705 (2003-12-01), Duprey et al.
patent: 6691245 (2004-02-01), DeKoning
patent: 6728898 (2004-04-01), Tremblay et al.
patent: 6735603 (2004-05-01), Cabrera et al.
patent: 6745303 (2004-06-01), Watanabe
patent: 2002/0026603 (2002-02-01), LeCrone et al.
patent: 2002/0083281 (2002-06-01), Carteau
patent: 2002/0138705 (2002-09-01), Suzuki et al.
patent: 2002/0178335 (2002-11-01), Selkirk et al.
patent: 2002/0194529 (2002-12-01), Doucette et al.
patent: 2003/0005355 (2003-01-01), Yanai et al.
patent: 2003/0014433 (2003-01-01), Teloh et al.
patent: 2003/0084242 (2003-05-01), Strange et al.
patent: 2003/0167419 (2003-09-01), Yanai et al.
patent: 2004/0073831 (2004-04-01), Yanai et al.
patent: 2004/0098637 (2004-05-01), Duncan et al.
patent: 2004/0153719 (2004-08-01), Achiwa et al.
patent: 2004/0153736 (2004-08-01), Viswanathan et al.
patent: 2004/0236983 (2004-11-01), Burton et al.
patent: 2004/0260970 (2004-12-01), Beardsley et al.
patent: 2004/0268177 (2004-12-01), Ji et al.
patent: 2005/0010592 (2005-01-01), Guthrie
patent: 2005/0021708 (2005-01-01), Raghuraman et al.
Gole Abhijeet P.
Muppalaneni Nitin
Blakely , Sokoloff, Taylor & Zafman LLP
Network Appliance Inc.
Peikari B. James
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