Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-11-22
2005-11-22
Myers, Paul R. (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C714S749000
Reexamination Certificate
active
06968417
ABSTRACT:
A method and apparatus for reducing latency in a peripheral interface circuit of an I/O node of a computer system. The apparatus includes a buffer coupled to a control unit. The buffer may be configured to receive data on a first bus and the control unit may be configured to generate a first command type in response to receiving a first quantity of data having invalid bytes within the buffer. The control unit may be further configured to generate a second command type in response to a receiving within the buffer a second quantity of data having no invalid bytes. Further, in response to receiving a particular transaction type, the control unit may be configured to generate the second command type before the first quantity of data is received within the buffer.
REFERENCES:
patent: 3878333 (1975-04-01), Shimizu et al.
patent: 3956589 (1976-05-01), Weathers et al.
patent: 4319323 (1982-03-01), Ermolovich et al.
patent: 5187795 (1993-02-01), Balmforth et al.
patent: 5410536 (1995-04-01), Shah et al.
patent: 6040792 (2000-03-01), Watson et al.
patent: 6278532 (2001-08-01), Heimendinger et al.
patent: 6414525 (2002-07-01), Urakawa
patent: 6414961 (2002-07-01), Katayanagi
U.S. Appl. No. 09/399,281, filed Sep. 17, 1999.
Askar Tahsin
Chambers Eric G.
Advanced Micro Devices , Inc.
Curran Stephen J.
Kivlin B. Noäl
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Myers Paul R.
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