Method and apparatus for reducing latency in a clock and...

Details Method and apparatus for reducing latency in a clock and... Method and apparatus for reducing latency in a clock and...

2011-03-29

2011-03-29

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S354000, C375S370000, C375S371000, C375S375000, C375S377000, C370S540000

Reexamination Certificate

active

07916822

ABSTRACT:
Disclosed is a system and method for a clock and data recovery (CDR) circuit. A phase selection circuit (PSC) generates a signal comprising frequency and phase. A voltage controlled oscillator (VCO) connected to the PSC generates a clock signal. The clock signal controls the frequency of the signal. The CDR circuit also includes a phase adjustment signal generator connected to the PSC for generating a phase adjustment signal. The phase adjustment signal controls the phase of the signal.

REFERENCES:
patent: 6208671 (2001-03-01), Paulos et al.
patent: 6307906 (2001-10-01), Tanji et al.
patent: 6636120 (2003-10-01), Bhakta et al.
patent: 6995618 (2006-02-01), Boecker
patent: 7421050 (2008-09-01), Aziz et al.
patent: 7587012 (2009-09-01), Evans et al.
patent: 7742507 (2010-06-01), Kurowski et al.
patent: 2001/0031028 (2001-10-01), Vaucher
patent: 2002/0075980 (2002-06-01), Tang et al.
patent: 2004/0141567 (2004-07-01), Yang et al.
patent: 2006/0029172 (2006-02-01), Andreotti et al.
patent: 2006/0146959 (2006-07-01), Aziz et al.
patent: 2006/0159211 (2006-07-01), Lin
patent: 2007/0285176 (2007-12-01), North

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