Method and apparatus for reducing frame buffer size in...

Details Method and apparatus for reducing frame buffer size in... Method and apparatus for reducing frame buffer size in...

2005-06-28

2005-06-28

Tung, Kee M. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Plural storage devices

C345S553000, C345S522000

Reexamination Certificate

active

06911985

ABSTRACT:
The present invention is directed to a method and apparatus for reducing the frame buffer size in a 3D graphics system. According to an exemplary aspect of the present invention, sorting and limiting the polygons that get processed at a given time may reduce the size of the frame buffer requiered in a graphics system. This may allow the system to process only those polygons that fall in one section of the screen. As a result, the system may not need to double buffer the whole screen. In a preferred embodiment, the location of the screen that gets processed may be arbitrary but should be preferably chosen so it is easy to sort the polygons and time-manage the process as the system needs to know when to swap from one location to another.

REFERENCES:
patent: 5450544 (1995-09-01), Dixon et al.
patent: 5617113 (1997-04-01), Prince
patent: 6498606 (2002-12-01), Penna et al.
patent: 6734873 (2004-05-01), Herf et al.

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